2024 WLI WISH Conference

Alexis Bjorlin

Vice President & GM, DGX Cloud

NVIDIA

Alexis is vice president and general manager for DGX Cloud at NVIDIA. Prior to NVIDIA, Alexis was vice president for Infrastructure at Meta where her team was responsible for Infrastructure hardware/software co-designed systems, including AI Systems, compute and storage platforms, and custom Silicon. Prior to Meta, she served as senior vice president and general manager of the Broadcom Optical Systems Division and previously Corporate Vice President of the Data Center Group and General Manager of the Connectivity Group at Intel where she oversaw three business units: Ethernet/Networking, High Performance Computing fabrics, and Silicon Photonics. Prior to Intel, she spent eight years as President of Source Photonics, where she also served on the board of directors.

She earned a B.S. in materials science and engineering from the Massachusetts Institute of Technology and a Ph.D. in materials science from the University of California at Santa Barbara.

Amber Huffman

Principal Engineer, Google Cloud

Google

Amber Huffman is a Principal Engineer in Google Cloud responsible for leading industry engagement efforts in the data center ecosystem across servers, storage, networking, accelerators, power, cooling, security, and more. Before joining Google, she spent 25 years at Intel serving as an Intel Fellow and VP. Amber is the President of NVM Express, on the Board of Directors for the Open Compute Project Foundation (OCP), on the Board of Directors for the Universal Chiplet Express Interconnect, and the chair of the RISC-V Software Ecosystem (RISE) Project. She has led numerous industry standards to successful adoption, including NVM Express, Open NAND Flash Interface, and Serial ATA.

Amber earned a bachelor’s degree in computer engineering from the University of Michigan and a master’s degree in electrical engineering from Stanford University. She has been granted more than 20 patents in storage architecture. Amber is known as an inclusive leader and passionate mentor for technologists, including serving on the Global Semiconductor Alliance Women’s Leadership Council and the University of Michigan’s Computer Science & Engineering National Advisory Board.

Angela Dalton

Director of Strategic Research and Advanced Development Operations

AMD

Dr. Angela Dalton is the Director of Strategic Research and Advanced Development (RAD) Operations at Advanced Micro Devices (AMD). She oversees business operations within the RAD organization and leads a portfolio of strategic initiatives on innovative new hardware and software technologies for high performance computing, artificial intelligence, security, and future computing capabilities. Angela has a B.S. in computer engineering from Virginia Tech as well as an M.S. and a Ph.D. in computer science from Duke University.

Belli Kuttanna

Co-Founder & CTO

Rivos

Belliappa (Belli) Kuttanna is a co-founder of Rivos Inc. an early-stage startup developing RISC-V based high performance systems targeting Enterprise Server infrastructure.

Prior to founding Rivos in May 2021, Belli was a Senior Fellow and the chief technology officer of Intel Capital at Intel Corporation for 3 years and the Chief Architect of the New Technology Group. He served on Intel’s corporate-level technical leadership pipeline development team for 5 years while mentoring several top technical leaders including women and other diverse individuals across the corporation.

Since the start of his career in 1989, Belli also held positions in the areas of ASIC and processor design and architecture at Texas Instruments Inc., Motorola Inc., Sun Microsystems Inc., and Qualcomm Inc.

Belli holds 30 issued patents and was the recipient of an Intel Achievement Award in 2008.

Belli earned his bachelor’s degree in electronics and communication engineering from Karnataka Regional Engineering College in India and a master’s degree in electrical engineering from Texas A&M University.

Christine King

CEO & Author of Breaking Through the Silicon Ceiling

Henry Schein One

Christine King serves on the Boards of Directors for Skyworks and Henry Schein One, where she also serves as Executive Chair and CEO. Christine began her career at IBM, where she rose from engineering technologist to leader of IBM’s $6B microelectronics business before her appointment at AMI Semiconductor as the world’s first female CEO of a semiconductor company. A book detailing her life and career, Breaking Through the Silicon Ceiling, was published in 2024.

Deirdre Hanford

Chief Executive Officer & Trustee

Natcast

Deirdre Hanford was appointed Chief Executive Officer and Trustee of Natcast in January 2024.  Prior to Natcast, Hanford served as an executive at Synopsys, a technology and market leader in electronic design automation and semiconductor design intellectual property.  Over the span of thirty-six years, Hanford’s roles included being Chief Security Officer, Co-General Manager of the Synopsys Design Group, and leader of a variety of customer engagement, applications engineering, sales and marketing groups.

Well known within the semiconductor ecosystem, Hanford has served on many industry advisory boards, including being a leader in the Department of Commerce Industrial Advisory Committee formed through the CHIPS Act. 

In July 2024, Hanford was selected to receive the 2025 IEEE Frederik Philips Award “for visionary leadership in electronic design automation for secure and energy-efficient microelectronics.” Hanford was additionally awarded the 2024 Brown Engineering Alumni Medal (BEAM) within the Brown University School of Engineering. She has also been named to WomenTech’s 2022 list of Women in Tech Leaders to Watch, VLSIresearch’s 2017 list of All Stars of the Semiconductor Industry, and National Diversity Council’s 2014 list of Top 50 Most Powerful Women in Technology. In 2001, Hanford was a recipient of the YWCA Tribute to Women and Industry (TWIN) Award and the Marie R. Pistilli Women in EDA Achievement Award.

Hanford earned a B.S. Engineering (electrical engineering) from Brown University and an M.S.E.E. from University of California, Berkeley.

Elif Balkas

Chief Technology Officer

Wolfspeed

Elif Balkas serves as the Chief Technology Officer at Wolfspeed, responsible for building on the company’s strong technology foundation in wide bandgap materials, driving technological improvements to yield products with high quality and reliability as Wolfspeed continues to grow as the only pure play, vertically integrated silicon carbide company. During her 19+ tenure with the company, Elif served in a variety of leadership positions in R&D and operations, dedicating most of her time and focus on developing technologies that are scalable for manufacturing purposes and to enable more efficient and powerful electronic systems.

Elif cofounded the Women’s Initiative at Wolfspeed, to encourage, develop and support women who will lead the way in innovation and execution in every aspect of the business and community, and served as the leader of the Professional Development Focus to create an environment where everyone’s perspectives, ideas and contributions matter. She continues to serve on Women’s Initiative’s Steering Committee to foster diversity at all levels to create better results for the Company and our community.

Prior to Wolfspeed, Elif served as a scientist at Intrinsic Semiconductor where she was responsible for GaN and SiC epitaxy product development with a focus on high quality and efficient processes. Elif holds a Ph.D. in Materials Science with a minor in Electrical and Computer Engineering from North Carolina State University, specialized in GaN crystal growth via physical vapor transport. Elif is also graduate of the Chief Technology Officer Program at Wharton School.

Gayathri Radhakrishnan

Partner

Hitachi Ventures

Gayathri (G) Radhakrishnan has over two decades of multi-disciplinary experience across domains such as product management, product marketing, corporate strategy, M&A and venture investments at both Fortune 500 companies and early-stage startups in the technology sector. As a Partner at Hitachi Ventures, she actively invests in technology startups that are enabling digital transformation. Prior to that, she was with Micron Ventures, focused on applied AI in the areas of Manufacturing, Healthcare, Mobility and also enabling technologies in datacenter and storage related technologies.

She has a Masters in EE from The Ohio State University and MBA from INSEAD in France. She is also a Kauffman Fellow.

Jeanne Trinko Mechler

Fellow, Custom & Compute Silicon

Marvell Technology

Jeanne Trinko Mechler is a fellow at Marvell Technology in Custom & Compute Silicon, with over 30 years of experience in SOC design, including AI/ML accelerators. After 30 years at IBM, she joined GLOBALFOUNDRIES in 2015 and Marvell in 2018, where she has led over 60 chip designs across 10+ technology nodes.

She is the author of High Speed SerDes Devices and Applications and holds more than 20 patents/publications. Jeanne chairs Marvell’s engineering conference and has been an invited speaker at the Design Automation Conference. She holds the M.S. and B.S. in electrical engineering from the University of Vermont and the M.S. degree in engineering management from the National Technological University.

Lalitha Suryanarayana

Vice President, Corporate Development and Strategy

Seagate

Lalitha Suryanarayana joined Seagate in 2022 as Vice President of Corporate Development and Strategy. In this role, she leads the company’s strategic initiatives relating to mergers, acquisitions and divestitures, equity investments and emerging growth opportunities. Lalitha’s thirty-year career spans a diverse set of leadership roles in corporate strategy, product management, ecosystem partnerships and R&D within the semiconductor and telecom industries. Prior to Seagate, she served as VP of Strategy and M&A for Infineon Technologies, Americas.

Ms. Suryanarayana is the inventor on fifty issued patents and has multiple publications including a technical book to her credit. During her early tenure as an R&D engineer, she was widely recognized for her pioneering contributions to the industry standardization of mobile and device-independent web technologies.

Lalitha holds an M.S. degree in Electrical Engineering from New York University and an M.B.A. from the University of Texas, Austin.

Lama Nachman

Senior Fellow, Director of Intelligent Systems Lab

Intel

Lama Nachman is an Intel fellow and serves as the Director of Intelligent Systems Research Lab within Intel Labs. With a profound commitment to advancing human potential through AI, her research centers on Responsible Human AI Collaboration. Leading a diverse and multi-disciplinary team of researchers, Lama delves into innovative user experiences, sensing systems, algorithms, and applications, with a focus on transferring these advancements to Intel’s business units to shape the future of their products and influence manufacturing and design with AI. With 28 years of expertise spanning context-aware computing, human/AI systems, responsible AI, multi-modal interactions, sensor networks, computer architecture, embedded systems, and wireless technologies, Lama also spearheads Intel’s Responsible AI program and the RAI Advisory Council.

In addition to her research, Lama has made significant contributions to the academic community. She has served as an editor for prestigious publications such as IMWUT (Proceedings of the ACM on Interactive, Mobile, Wearable and Ubiquitous Technologies) and TIOT (IEEE Transactions on Internet of Things) as well as many other top tier Technical Program Committees over the years. Furthermore, Lama actively participates in cross-industry programs and partnerships bridging the gap between academia and industry to drive innovation and societal impact.

One of her most notable accomplishments was her collaboration with the renowned Professor Stephen Hawking. Commencing in 2012, Lama led a dedicated team in developing a groundbreaking software platform and sensing system that facilitated Hawking’s communication. She further championed the open-source release of this technology, empowering individuals with disabilities worldwide to communicate effectively and live with increased independence. With a passion for technology and a dedication to responsible AI, Lama continues to shape the landscape of AI research, ensuring that its benefits are accessible to all. Lama’s academic background includes a BS and MS in computer engineering from the University of Wisconsin-Madison, and she has over 80 publications across her diverse research interests.

Nuno Ramalho

Executive Director, R&D

Synopsys

Nuno Ramalho is an Executive Director of R&D at Synopsys responsible for Worldwide CAD in Solutions Group and Site Leader for Synopsys in Lisbon. Prior to joining Synopsys in 2009, he was VP at Chipidea Microelectronica and Director of R&D. Before joining Chipidea, Nuno worked 13 years as a research engineer and design manager at Philips Research and Philips Semiconductors in The Netherlands, UK, France, and at IMEC in Belgium, specializing in Analog and Mixed-Signal IC design for Audio, Video, Magnetic Recording and Optical Communications.

Nuno received his BAI and MSc degrees in Microelectronics in 1988 from Trinity College, University of Dublin. He has put numerous ICs into production, co-authored 6 papers, and holds 14 US and European patents. Inclusion & Diversity initiatives are part of his identity, born in the Azores but lived from an early age in 8 countries across 3 continents, has dual citizenship and speaks four languages.

Parthasarathy (Partha) Ranganathan

Vice President & Technical Fellow

Google

Parthasarathy (Partha) Ranganathan is currently a VP, technical Fellow at Google where he is the area technical lead for hardware and datacenters, designing systems at scale. Prior to this, he was a HP Fellow and Chief Technologist at Hewlett Packard Labs where he led their research on systems and data centers.  Partha has worked on several interdisciplinary systems projects with broad impact on both academia and industry, including widely-used innovations in energy-aware user interfaces, heterogeneous multi-cores, power-efficient servers, accelerators, and disaggregated and data-centric data centers. He has published extensively (including being the co-author on the popular “Datacenter as a Computer” textbook), is a co-inventor on more than 100 patents, and has been recognized with numerous awards. He has been named a top-15 enterprise technology rock star by Business Insider, one of the top 35 young innovators in the world by MIT Tech Review, and is a recipient of the ACM SIGARCH Maurice Wilkes award, Rice University’s Outstanding Young Engineering Alumni award, and the IIT Madras distinguished alumni award. He is one of few computer scientists to have his work recognized with an Emmy award. He is also a Fellow of the IEEE and ACM, and has also served on the board of directors for OpenCompute.

Rani Borkar

Corporate Vice President, Azure Hardware Systems and Infrastructure

Microsoft

Rani Borkar has served as Corporate Vice President, Azure Hardware Systems and Infrastructure, at Microsoft Corporation, a global technology provider, since June 2019. She also served as Microsoft’s Corporate Vice President, Microsoft Cloud Capacity, Supply Chain and Provisioning, from 2017 to June 2019. From 2016 to 2017, Ms. Borkar was Vice President, OpenPOWER Development at IBM Corporation, a global technology and consulting company. Prior to IBM, Ms. Borkar worked at Intel Corporation for 27 years, most recently as Intel’s Corporate Vice President and General Manager, Product Development Group.

Ms. Borkar serves as a member of the board of directors of the Global Semiconductor Alliance (GSA).

Ms. Borkar joined the Applied Materials board of directors in 2020.

Rajeev Pal

Vice President, Engineering

Qualcomm

An accomplished leader with over two decades of experience in Software Project and Global Team leadership. Proven track record of successful leadership in industry-leading products such as 5G Modem/chipset, 2 Gbps LTE/Snapdragon X24, 5G Multimode/NAS, Snapdragon 810, Snapdragon X5 LTE Modem, and BREW. Demonstrated ability to translate visions into missions, and deliverables and delighting the stakeholders with exceptional execution. Effective leader with the capacity to build, mentor, and manage high-performing global teams including onsite and offshore employees. Excellent technology background including experience in large-scale software development, integration, and process deployments including the market launch of multiple chipset and handset products. Extensive international experience includes managing various programs and directing multi-site operations. Proficiency in engineering as well as business management.

Sylvia Acevedo

Board Member

Qualcomm & Credo Technologies

Sylvia Acevedo is an eminent leader who has made an enduring impact across diverse industries, excelling in both corporate and public sectors as a pioneering trailblazer. Beginning her career as a rocket scientist at NASA’s Jet Propulsion Laboratory, Sylvia’s journey took her through executive roles at renowned companies such as Apple, Autodesk, Dell, and IBM. Sylvia currently serves on the Public company Corporate Board of Directors of Qualcomm and Credo Technologies.

From 2016 to 2020, she was the CEO of the Girl Scouts of the USA, modernizing the organization with over 126 new STEM badge programs. Sylvia also served as a White House Commissioner during the Obama Administration.

Sylvia authored the bestselling memoir, ‘Path to the Stars: My Journey from Girl Scout to Rocket Scientist,’ promoting perseverance and self-determination.

Sylvia holds a Bachelor’s degree with Honors in Industrial Engineering from New Mexico State University and a Master’s engineering graduate degree from Stanford University, where she was one of the first Hispanics, male or female, to earn such a degree. Sylvia was awarded an Honorary Doctorate from Washington College, and in 2022, Duke University awarded her an Honorary Doctorate of Science.

(Design) Aradhana Kumari

Technical Leader

STMicroelectronics

Aradhana is working as a Staff Engineer in the Strategy, Innovation and R&D governance at STMicroelectronics Crolles, France. She is a digital designer primarily responsible for the design of high-speed link controllers. She is skilled in digital logic synthesis, place-route, & timing flows for high-speed and low-power designs that mandate high figure of merit. She has 4 US patent filings and 8 publications in major international conferences. Aradhana is the winner of 2023 GSA Female Up & Comer award. She was awarded the Special Achievement Award this year by the Global MIPI Alliance for her contributions to I3C proliferation.

Aradhana completed her Masters in Engineering from the Indian Institute of Technology and has over 4.5 years experience in the semiconductor industry.

(Design) Dhara Vaishnav

Leader, Solutions Architecture Hi-Tech Electronics Semiconductors

Amazon Web Services

Dhara is Leader, Solution Architecture, HiTech Electronics Semiconductor at AWS. Her team caters to enterprise customers in three sub-verticals: Integrated Design Manufacturing, Electronic Manufacturing Services, and Equipment Suppliers. She is passionate about helping customers with their digital transformation journey in areas such as smart manufacturing, semiconductor EDA, Generative AI, Artificial Intelligence & Machine Learning, and Data Engineering/Science.

She joined Amazon in 2016 and has held several engineering/tech roles in data engineering, data science, and solution architecture. Her mission is to build high-impact teams by embracing the collective experiences and diverse perspective of individuals, recognizing the markets with the greatest needs, and innovating and building world-class solutions for customers.

Prior to Amazon, she was a technical leader at Intel, HP, and Cognizant. She has a Bachelor Of Engineering (Computer Science) degree from Gujarat, India and holds an MBA from UC Berkeley, Haas School Of Business.

(Design) Faye Yang

Senior Hardware Systems Engineer, Cloud AI / Advanced System Group

Microsoft

Faye Yang is a Senior Hardware Systems Engineer in the Cloud AI and Advanced System Group at Microsoft Corporation, based in Mountain View. With more than 10 years of experience developing hardware system architecture, Faye has been pivotal in designing and integrating next generation network accelerator cards. Her contributions have driven innovation and excellence in the hardware systems.

Before joining Microsoft, Faye was a hardware engineer at Amazon Web Services, where she led the design of high- speed networking switch products. Prior to AWS, she worked as a hardware developer at Cisco Systems. Faye holds a master’s degree in electrical engineering from the University of Southern California.

(AI) Granthana Rangaswamy

Senior Hardware Systems Engineer

Meta

Granthana is a Senior Hardware Systems Engineer for Meta’s Next-Generation Training and Inference Accelerator Systems. With over 20 years of experience, she possesses extensive technical and leadership expertise in a wide range of networking and compute products. Throughout her career, Granthana has worked at multiple companies, including Intel, Juniper Networks, and Meta, leading complex and diverse systems that span from remote radio units to intricate MTIA systems designed for Meta’s AI workloads. She holds four patents, Masters Degree is Electrical Engineering  and has authored multiple publications. Currently, she is exploring the application of machine learning techniques to analyze high-speed hardware systems.

(Test) Kate Cheng

Senior Staff Test Development Engineer

Synaptics

Kate is a Senior Staff Test Development Engineer for Wireless Products Division in Synaptics. She works for test solution development, yield improvement, and customer failure analysis for RF products, mainly WiFi and BT combo chips. She is familiar with different tester platforms including Teradyne Ultraflex, J750 and Eagle Test System.

Prior to Synaptics, she worked in Texas Instruments Taiwan as product engineer and test development engineer responsible for high speed data converter and automotive LDO and LED drivers. Kate received B.S. and M.S. in engineering and system science from National Tsing Hua University in 2007 and 2009.

(Test) Khushboo Agarwal

Principal Member Of Technical Staff/DFT Manager

AMD

Khushboo has 18+ years of experience in the semiconductor industry. She started her career with Texas Instruments, and after spending 8 years at TI, joined AMD in 2014.

Khushboo’s primary focus has been on overall test architecture, test clocking, coverage and low-power DFT. At TI, she worked on SOC DFT RTL development, ATPG as well as post-silicon support. After joining AMD (Circuit Technology DFT team) she has been working on DFT architecture as well as DFT sub-system RTL development for several generations of PHYs (both third-party as well as in-house).

Apart from work, she likes spending quality time with my family and cooking in her free time.

(Process) Lakshmi Suresh

Senior Engineer Lead, Metals

Micron Technology

Lakshmi Suresh is a Senior Engineer Lead – Metals  at Micron, specializing in advanced metallization processes for wordline (WL) and interconnect technologies in next-generation semiconductor devices. Since joining Micron in December 2021, she has worked across Boise and Singapore sites,  focusing on innovative solutions for improving material performance, playing a pivotal role in developing scalable, high-reliability processes for critical applications.

Lakshmi earned her PhD in Materials Science and Engineering from the National University of Singapore in 2021, where she researched photo-electrochemical materials for energy storage and sensing. Her work, widely published in top-tier journals, continues to drive progress in the semiconductor industry.

(Test) Lauren Getz

Product & Segment Manager

Teradyne

Lauren Getz is the mobile power segment product manager at Teradyne, where she has been integral to developing the next generation of test technology and software tools for power and precision analog devices. Prior to this, she was a factory applications engineer supporting product upgrades and applications development globally. Lauren was a SEMI 20 under 30 recipient, which recognizes the industry’s brightest young leaders, and holds a Bachelor of Science degree in electrical and computer engineering.

(Test) Lei Han

Test & Validation Engineer

Synopsys

Lei Han is a staff Test & Validation engineer within Synopsys’ design technology group. Since 2020, Lei has concentrated on optimizing the backend flow to guarantee the robustness of EDA and clock quality through comprehensive testing. With a fervor for pioneering solutions, Lei seeks to establish the testing framework and explore validation methodologies. The emphasis on clock sensitivity testing exemplifies a proactive approach to addressing customer requirements and left-shifting the development cycle.

In 2023, Lei Han was recognized with the Technical Leadership Award. Lei earned a BS degree from the Joint Institute of Shanghai Jiaotong University and the University of Michigan in 2020.

(AI) Patricia Fong

Senior Staff Manager

Marvell Technology

Patricia Fong is a Senior Staff Manager with Marvell in Santa Clara Custom Compute & Storage and has been focused on Back-End Design for the past 16 years. Over this time, Patricia has helped taped out over 25 designs from 90nm to 5nm process nodes. Patricia holds a Master of Engineering in Engineering Management from Duke University and a Bachelors of Science in Electrical Engineering and Computer Science from University of California, Berkeley.

(Test) Rachana Maitra

Senior Principal Engineer, Corporate SDL

Marvell Technology

Rachana Maitra is a Senior Principal Engineer and Corporate SDL lead at Marvell Technology Inc.
She has worked in the tech industry for over 25 years, which started in 1999 at Intel corporation as a verification/validation engineer. In 2006, she joined Marvell and went on to leading pre- and post-silicon validation efforts for 16 years covering 20+ products, across multiple business units. In 2022, Rachana joined central management team and took on the responsibility of leading Marvell’s proactive process and strategy for product security assurance.

Rachana earned MSE in Electrical Engineering from Arizona State University. She regularly volunteers at hospice of the valley and enjoys spending time with family in her spare time.

(Test) Salina Dbritto

AI/HPC Systems Engineer

Meta

Salina is an AI/HPC systems engineer at Meta, where she specializes in developing interconnect solutions, automation strategies, and test and validation flows for AI systems. She provides technical leadership in integrating networking flows with compute and silicon to land AI systems. She leads the System Integration forum at Meta, which focuses on building integrated automation, tooling stack, and test strategies for AI, driving the shift from component to system mindset.

Salina has over 10 years of industry experience. Before joining Meta, she worked as a Network Development Engineer at Dell.  She holds a master’s degree in electrical engineering with majors in Networking from San Jose State University. Passionate about public speaking, singing and event management.

(AI) Srividya Jayaram

Principal Product Engineering Manager, Fab Analytics

Siemens EDA

Srividya Jayaram is the Principal Product Engineering Manager for the Wafer Defect Management solutions and Fab Insights products under Calibre semiconductor manufacturing software tools at Siemens EDA. She currently leads the product engineering and marketing efforts for Fab analytics domain, researching practical EDA solutions to challenges identified in the Fab. She joined Mentor Graphics in 2005 (acquired by Siemens in 2017) and held various product engineering and technical marketing roles in OPC and RET areas.

Sri has over 35 publications and is actively involved in the SPIE and SEMI activities. She received her B.S. degree in Electronics Engineering from University of Madras, India and Masters in Electrical Engineering from State University of New York at Buffalo.

(Process) Upasana Pandya

Senior Customer Solutions Manager

Amazon Web Services

Upasana is a Sr. Customer Solutions Manager supporting enterprise customers. She has worked in the tech industry for over 18 years in serving various leadership roles across Utility, Education, Pharma and most recently at AWS. In her last 2.5 years at AWS she has led many transformation projects focusing on Datalake modernizations and GenAI.

Prior to joining AWS, she served as an advisor to the CIO for PSEG (Public Service Enterprise Group), a leading utility company. Prior to that, She held technology leadership roles in consulting with 10 years in driving large-scale programs and projects for internal capability development and external clients across Pharma, Education, Transportation and Construction industries.

(Process) Yashvi Singh

Process Integration Engineer, R&D DRAM

Micron Technology

Yashvi Singh has been a Process Integration Engineer with the R&D DRAM Organization at Micron Technology since September 2019. She has worked at various Micron locations, such as Boise USA, Taichung Taiwan and Hiroshima Japan. She leads multiple module development projects for next-generation DRAM nodes.

Ms. Singh earned her master’s degree (2019) in Materials Science and Engineering from Stanford University, USA. She holds a Bachelor of Technology degree (2017) in Metallurgical and Materials Engineering from NIT Trichy, India, where she graduated as the Valedictorian and received the President Medal. Ms. Singh is an alumna of the Boise Metro Chamber’s Leadership program (2021-2023). She is passionate about human rights issues and enjoys painting, traveling, reading, and skiing.