SemiWiki: NoCs give architects flexibility in system-in RISC-V design
RISC-V tends to generate excitement over the possibilities for the processor core, any custom instruction extensions, and its attached memory subsystem.
Arteris Ncore Cache Coherent Interconnect IP Certified for ISO 26262 Automotive Functional Safety Standard
Campbell, Calif., 11/14/2023 - Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation, today announced that its Ncore Read More..
Mixel Celebrates 25 Years of Mixed-Signal Excellence
November 16, 2023
Mixel, a leading provider of mixed-signal IP, reaches 25-year milestone supporting customers worldwide
The post Mixel Celebrates 25 Years of Mixed-Signal Excellence appeared first on Mixel Inc | Mixed-Signal Excellence.
KPMG releases new Consumer Technology Survey
Santa Clara, California, 11/15/2023 - KPMG has released new market research. The Consumer Technology Survey measures how U.S. consumers across all age groups are Read More..
EDN: Extending network-on-chip (NoC) technology to chiplets
The majority of today’s ICs employ some form of NoC, but how will the NoC-based chiplets communicate with each other?
Electronics Weekly feature – Non-volatile memory may boost ReRAM tech
Non-volatile memory may boost ReRAM tech Intrinsic and sureCore combine forces to speed time to market for embedded ReRam See the full article on ElectronicsWeekly.com
Push Button NoCs
System-on-chip (SoC) designers face the challenge of integrating numerous IP blocks with varying protocols, data widths, and frequencies. Traditional bus-based solutions are challenged Read More..
Network-on-Chip Interconnect Topologies Explained
Connecting IP blocks in complex system-on-chip (SoC) designs presents a central challenge due to the unique characteristics of these IP blocks. An effective Read More..